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by Peter Dzwig
The end of August saw the Hot Chips meeting at Stanford. There were announcements that we think deserve comment, from IBM, Sun and AMD – which in turn have opened many questions.
The diversity of processor architecture among the big players continues and there is little sign of consensus about which way the market will evolve.
IBM were talking about the Power 7 which will apparently be available in 4, 6 and 8 processor variants, have 32MB of Level 3 cache and support 4 threads per core. Rumour has it that it will be among the fastest processors available, though whether it will surpass Fujitsu's SPARC implementation remains to be seen. Sun's Rainbow Falls (SPARC T3) processors have 16 cores each with its own L2 cache and of course being a Sun product supports threading, in this case up to 128 threads. AMD's Magny-Cours offering will have 12 cores. In reality it's two 6-core Istanbul processors on the same die. Intel weren't very conspicuous, giving more details of their 8-core, 24MB cache and 16-thread Nehalem EX, although they did talk a little about their 32nm Westmere chip.
The group viewed as a whole show that designers are now putting a considerable amount of effort into novel communications architectures and communications speeds, and also in matching caching structures to achieve the potential throughput in these chips. Many of these processors have faster core interconnects and faster I/O enabling performance and data movement to be better balanced. For this generation, and the ones beyond it, the ability to move data between cores is going to be crucial.
With the exception of Westmere, this collection is slated for release in the course of next year. So 2010/11 is expected to see the evolution into double-digit cores of many top-end servers, which is where this group is mainly targetted.
The real question: “whether or not software will be able to use this power” is the key to the commercial success of these processors and others that follow in their wake. In the main, many commercial server-based systems use one (fast) core or perhaps a pair of cores to deal with replicas of the same process. However only a fraction of the potential performance is being reached in this way. Proper parallelism is a way off yet in mainstream applications. For the hardware industry, however, its throughput profile makes the high-end server market the obvious point at which to introduce these high core count architectures.
Today in most people's terms quad-core is regarded as mainstream and fairly high performance, so what is being proposed here is a big leap forward, even for high-end servers. The faster internal structure means that the architectures are, as a whole, becoming more balanced and so opening up to faster data streams both in I/O terms and among cores. However, the software industry and the peripherals industry haven't caught up yet. These new processors are becoming really data-hungry and there aren't yet that many applications around to take advantage of them.
Obvious industrial applications lie in the broadcast industry and in other media applications, including of course the Internet. The question is how long before the mainstream user catches up and how will they use the processors then.