Roll Your Own! Reconfigurable Computing with FPGAs
Francis Wray, Concertant
We stand at a crossroads in the development of computing. 20 years of a stable microprocessor architecture are coming to an end. A host of new technologies: GPGPUs, multicores, and FPGAs are already being deployed in real-world applications. All these new technologies usher in a new age of parallel computing. Both big and small players are making announcements about hardware which will change the face of computing. Quite how these changes will come about depends not only on the architecture of these new devices, but also on the underlying models of parallelism and memory and on the consequent new computer languages. The industry is in a state of flux and the jury still out on which of these models and languages will be successful.
Nevertheless some common themes are emerging. Programmers will need to be able to extract the inherent parallelism in their application. Somehow they will need to express this using language constructs. Somehow these implementations will need to scale to tens, hundreds, even thousands of processors. The degree to which these processes can be automated is the subject of heated debate, but the reality seems to be that the onus will be on the programmer in a significant number of cases.
Industry faces some significant barriers in the adoption of these new technologies. These include inherently serial legacy codes, limited potential for scalability, lack of programmers skilled in parallel programming, a lack of awareness of the impending move to parallel systems, a lack of software to exploit those systems, limited progress in the development and adoption of models of parallelism and new languages and the dearth of tools to support parallel program development.
Clearly the way forward must include a broad agreement on languages, library interfaces and models of parallelism which support all levels of the value chain. Somehow the industry needs to apply its collective wisdom to the development of a long-term roadmap (ten years plus) encompassing both hardware and software developments. We are beginning to see signs that this is happening. The announcement by Convey of an architecture able to incorporate new architectures is one sign of this. This may provide the impetus the reconfigurable computing community has needed and may finally bring FPGAs into mainstream computing. These devices map applications directly onto reconfigurable silicon as a sort of roll your own processor. They have significant advantages in terms of performance generally, and performance per watt specifically, over more conventional devices. In some cases this advantage may be over two orders of magnitude. The barrier to the wider adoption of FPGAs has been the difficulty of programming them. The announcement by the highly credible and rated Convey team may well represent a tipping point towards the wider use of this technology by stimulating the development of better development tools.
Similarly the OpenCL announcement by a consortium including NVIDIA, Intel and AMD may be the most significant announcement in high-performance computing for some time. OpenCL goes beyond the programming of graphics applications and looks to the wider issue of programming heterogeneous, multicore, multiprocessor systems. This attempt to develop open interfaces and standards aimed at supporting portability from one system to another is a major initiative which brings together manufacturers and users in an attempt to make it a better market for the manufacturers and to preserve the software investments made by their customers.
These are indeed interesting times!